HBM stacking method: Samsung Electronics and SK Hynix to use TC bonding and MR

In 2023, the demand for high-capacity memory (HBM) continues to rise, with the growing use of generative artificial intelligence (AI), and competition in the memory industry for stacking memory chips making difference in the market. The more layers of HBM we stack, the better it can handle and process data. Currently, the primary HBM product available is the 8-layer version. However, the next generation, the 12-layer HBM, is also on the verge of mass production.

Currently, two main methods are employed in stacking HBM: Thermal Compression (TC) bonding and Mass Reflow (MR). There had been expectations of introducing a cutting-edge packaging technology called hybrid bonding for the 12th layer of HBM and beyond. This was mainly due to limitations like heat generation and package height associated with TC and MR. But, recent advancements by major companies have overcome these challenges, making TC bonding and MR processes suitable for up to 12 layers.

According to the latest information, both Samsung Electronics and SK Hynix are expected to use TC bonding and MR, respectively, for up to 12 layers in their HBM stacking process. This implies that hybrid bonding, initially planned for HBM 12-speed products, will likely be implemented in the next generation of 12-speed or even 16-speed products. Hybrid bonding is a technology that connects memory chips using copper-to-copper connections instead of traditional bumps and solder balls. This innovation significantly increases input/output (IO) capacity compared to solder balls, allowing for up to 10,000 to 100,000 vias to be connected within a 1-square millimeter area.

HBM stacking method

Samsung Electronics presented a paper at the ‘2023 Electronic Component Technology Conference (2023ECTC)’ in June, focusing on 12-layer or higher HBM. In the paper, Samsung Electronics emphasized the importance of improving thermal performance for high-level HBM stacking.

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